This invention relates to systems which test integrated circuit chips; and more particularly, it relates to modules for preventing instability and oscillations in such systems.
In the prior art, an integrated circuit chip was tested for operability by the means of a tester unit which sent sequences of input signals to the chip, and which received and checked resulting output signals from the chip. One such tester unit, for example, is model 20 from Sentry Corporation. Typically, the tester is quite large and bulky, and it is located several feet from the chip that is being tested. That chip is held in place during the test by a very delicate fixture; and conductors, which are several feet long, carry signals between the tester and the chip.
Such systems have worked satisfactorily in the past without any instability or oscillations. However, the present inventors have observed that such systems go into unstable oscillation when the number of output signals from the chip is increased above a certain number. Further, the present inventors have determined that these oscillations are attributed to certain parasitic capacitances and parasitic inductances in the transistors on the chip which drive the output signals and the circuitry which couples to them to the tester. Due to these parasitic components, they have determined, a positive feedback occurs in the chip that is under test which results in uncontrolled oscillations in the output signal.
Accordingly, a primary object of the invention is to provide an interface module which resides between the tester unit and the chip that is being tested, and which operates to prevent the above described oscillations.